結構化ASIC：方法與比較-外文翻譯

隨著制造工藝技術的不斷進步，掩模的制造成本變得望而卻步的昂貴。結構化ASICs能夠提供的價格和性能在ASICs和FPGAs之間。他們在中等規(guī)模的生產量上相當有吸引力，并提供良好的知識產權保障。本文提出了一種結構化ASIC方法，關于兩種金屬，一種掩模如何被制定，被描述。CAD工具與ASICs的常規(guī)設計流程完全兼容，包括ASICs和FPGAs的延時性能比較也能給出。實施結構化ASIC原型的LED背光LCD控制器是制造了0.13微米CMOS工藝。這是驗證和功耗比ASIC設計。


Structured ASIC: Methodology and Comparison

Abstract—As fabrication process technology continues to Advance, mask set costs have become prohibitively expensive.Structured ASICs can offer price and performance between ASICs and FPGAs. They are attractive for mid-volume production and offer good intellectual property security.In this Paper a structured ASIC methodology, where 2 metal-and 1 via-mask are customised, is described.The CAD tools are fully compatible with conventional ASIC design flows and a comparison of area and delay performance with ASICs and FPGAs is given. A prototype structured ASIC implementing an LED-backlit LCD controller was fabricated in a 0.13μm CMOS process. It was verified and power consumption compared with an ASIC design.