尺寸的測(cè)量方法和不同的邏輯控制的PLC程序設(shè)計(jì)方法的復(fù)雜性(外文翻譯)

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　　摘要：目前有各式各樣的邏輯控制設(shè)計(jì)方法應(yīng)用于工業(yè)的邏輯設(shè)計(jì)。這些方法包括梯圖表、功能部件圖;連續(xù)函數(shù)圖表和流程圖,但喜歡可驗(yàn)證性,學(xué)術(shù)界已開(kāi)發(fā)更多的邏輯控制的設(shè)計(jì)方法,如模塊化的有限狀態(tài)機(jī)和實(shí)驗(yàn)室網(wǎng)。利用這些重要的程序可以證實(shí)和一些邏輯可以自動(dòng)生成從一個(gè)部分的計(jì)劃。本文的主要貢獻(xiàn)是確定測(cè)量方法不同方法編寫(xiě)的程序,這樣的表現(xiàn)會(huì)比較方法。
　　我們證明了這些方法的使用四個(gè)項(xiàng)目樣本進(jìn)行類似的功能在同一臺(tái)機(jī)器上,寫(xiě)在四個(gè)邏輯控制設(shè)計(jì)方法:梯圖表、實(shí)驗(yàn)室網(wǎng)、信號(hào)解釋說(shuō)明網(wǎng)、模塊化的有限狀態(tài)機(jī)。

　　
關(guān)鍵詞的邏輯設(shè)計(jì)方法的比較•PLC程序控制復(fù)雜性
　　

Methods of measuring the size and complexity of PLC programs in different logic control design methodologies


Abstract Currently there is a wide variety of logic control design methodologies used in industrial logic design. These methodologies include ladder diagrams, function block diagrams,sequential function charts, and flow charts, but driven by a desire for verifiability, academics are developing additional logic control design methodologies, such as modular finite state machines and Petri nets. Using these, important properties of programs can be verified and some logic can be generated automatically from a part plan. The main contribution of this paper is to define methods for measuring programs written in different methodologies, so that the performance of the methodologies can be compared.
We demonstrate these methods of measurement using four program samples that perform similar functions on the same machine, written in four logic control design methodologies: ladder diagrams, Petri nets, signal interpreted Petri nets and modular finite state machines.

Keywords Comparison of logic design methods •Logic control • PLC program complexity