3.3萬(wàn)字 55頁(yè)
摘要 ：
本文針對(duì)OpenRISC 1200進(jìn)行嘗試性研究，借助SOPC平臺(tái)來驗(yàn)證IP軟核的性能。通過對(duì)OpenRISC 1200的源代碼進(jìn)行編譯，仿真，綜合，然后下載到SOPC開發(fā)實(shí)驗(yàn)平臺(tái)中對(duì)其進(jìn)行驗(yàn)證、測(cè)試。在對(duì)OpenRISC 1200性能進(jìn)行驗(yàn)證的過程中，綜合使用了多種開發(fā)工具：WinCVS、Active-HDL、Synplify Pro 8.1、Quartus II 。此外還涉及到Linux操作系統(tǒng)，并在Linux系統(tǒng)下進(jìn)行了OpenRISC 1200工具鏈的編譯安裝。另外，本文就OpenRISC 1200和當(dāng)前比較有影響的其他兩款嵌入式CPU軟核Nios II和Leon 2在特點(diǎn)、結(jié)構(gòu)、面積方面進(jìn)行了對(duì)比。
關(guān)鍵詞: OpenRISC 1200；SOPC技術(shù)；FPGA；IP核
Abstract:
The paper researches OpenRISC 1200 tentatively, and verifies the performances of soft IP core on SOPC platform. The code of OpenRISC 1200 is compiled, simulated, synthezied, and programmed to SOPC Platfrom to test and verify. In the processing, such tools are applied: Active HDL, Synplify Pro 8.1, Quartus II, as well as the Linux operating system is involved, also the set of the OpenRISC 1200 compiler tools is verified. Furthermore, the paper compares OR1200 to some other soft-core such as Nios II and Leon 2 on the performance, structure and speed and occupied rate.
Finally, this article summarizes the whole work of the task，and puts forward the ideas and insights for the developments and applications on OpenRISC 1200 in the future.
Keywords: OpenRISC 1200；SOPC technology；FPGA；IP Core.

目 錄
1 引言
2 SOPC技術(shù)
3 RISC處理器體系結(jié)構(gòu)
3.1 概述
3.2 RISC處理器的特性
4 OR1200架構(gòu)
4.1 OpenRISC 1000概述
4.2 OR1200構(gòu)架
5 OpenRISC 1200在SOPC上的驗(yàn)證
6 結(jié)論和展望
致謝
參考文獻(xiàn)