FIR數(shù)字濾波器的FPGA實(shí)現(xiàn)

目  錄
摘要 1
關(guān)鍵詞 1
ABSTRACT 1
KEY WORDS 1
引 言 2
1 數(shù)字濾波器 3
1.1 數(shù)字濾波器的基本概述 3
1.1.1 數(shù)字濾波器的分類 3
1.1.2 數(shù)字濾波器的技術(shù)要求 3
1.1.3 數(shù)字濾波器的設(shè)計(jì)概述 4
1.2 FIR 濾波器的原理及結(jié)構(gòu) 4
1.2.1 FIR濾波器的特點(diǎn) 4
1.2.2 線性相位FIR濾波器 5
1.3 FIR濾波器的設(shè)計(jì) 6
1.3.1窗函數(shù)法設(shè)計(jì)原理 6
1.3.2幾種常用的窗函數(shù) 7
1.3.3海明窗簡(jiǎn)介 8
2  可編程邏輯器件概述 9
2.1 可編程邏輯器件的發(fā)展歷程 9
2.2 FPGA簡(jiǎn)介 10
2.2.1 FPGA的基本結(jié)構(gòu) 10
2.2.2 可編程邏輯器件的設(shè)計(jì)方法及流程 11
3 基于QUARTUSⅡ軟件設(shè)計(jì)FIR濾波器 12
3.1 設(shè)計(jì)環(huán)境及工具介紹 12
3.1.1開(kāi)發(fā)環(huán)境QuartusⅡ 12
3.1.2 DSP Builder簡(jiǎn)介 14
3.1.3 MATLAB介紹及FIR系數(shù)生成 15
3.2 FIR濾波器電路軟件設(shè)計(jì)及模擬仿真 17
4  基于FPGA芯片硬件實(shí)現(xiàn)FIR濾波器 19
4.1 CYCLONE芯片介紹 19
4.2 A/D、D/A轉(zhuǎn)換電路的描述 20
4.2.1 TCL5510簡(jiǎn)介 20
4.2.2 TCL5602簡(jiǎn)介 22
4.3 FIR濾波器硬件實(shí)現(xiàn) 23
4.4 測(cè)試結(jié)果 24
結(jié)語(yǔ) 29
致謝 29
參考文獻(xiàn) 30

 
FIR數(shù)字濾波器的FPGA實(shí)現(xiàn)

摘要:隨著科技的發(fā)展，電子電路的設(shè)計(jì)正逐漸擺脫傳統(tǒng)的設(shè)計(jì)模式，而采用FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列）來(lái)設(shè)計(jì)電子電路正成為設(shè)計(jì)的趨勢(shì)。在數(shù)字信號(hào)處理中，濾波占有重要的地位。有限長(zhǎng)沖激響應(yīng)（FIR）濾波器由于只有零點(diǎn)、系統(tǒng)穩(wěn)定，便于實(shí)現(xiàn)FFT算法、運(yùn)算速度快、線性相位的特性和設(shè)計(jì)更為靈活等突出優(yōu)點(diǎn)而在工程實(shí)際中獲得廣泛應(yīng)用。本文將利用窗函數(shù)法的設(shè)計(jì)原理來(lái)得到算法，在QuartusⅡ開(kāi)發(fā)軟件上對(duì)設(shè)計(jì)進(jìn)行編譯，生成代碼。把編譯代碼下載到硬件開(kāi)發(fā)板上并進(jìn)行測(cè)試。從而完成對(duì)FIR數(shù)字濾波器的FPGA實(shí)現(xiàn)。
關(guān)鍵詞：FPGA  FIR濾波器  窗函數(shù)  MATLAB

The design of FIR digital filter based on FPGA

Abstract:With the development of the technology, the design of the electronic circuit is getting rid of traditional pattern,And using FPGA to design electronic circuit is becoming the trend . In the Digital signal processing, filter plays a great role. It is widely used in engineering practice because it contains only zeros,so that it has the advantage of system stable, fast FFT implementing, linearity phase,quick operation and so on.This article introduces how to use the window function of the design principles to realize the algorithm, as well as  how to compile and generate code  in the developing software of Quartus Ⅱ.Then the generated code is downloaded to hardware development board and tested,in order to  complete the FIR digital filter realization of the FPGA.
Key words:FPGA ;FIR filter ;Windows Function ;MATLAB