關于fpga的畢設論文英文翻譯文獻(外文原文+中文翻譯).doc
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關于fpga的畢設論文英文翻譯文獻(外文原文+中文翻譯),[1] using fpga technology towards the design of an adaptive fault tolerant frameworkerdogan, sevki (university of hawaii); gersting, judith l.; shaneyfelt, ted;...
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[1] Using FPGA technology towards the design of an adaptive fault tolerant framework
Erdogan, Sevki (University of Hawaii); Gersting, Judith L.; Shaneyfelt, Ted; Duke, Eugene L. Source: Conference Proceedings - IEEE International Conference on Systems, Man and Cybernetics, v 4, IEEE Systems, Man and Cybernetics Society, Proceedings - 2005 International Conference on Systems, Man and Cybernetics, 2005, p 3823-3827
ISSN: 1062-922X CODEN: PICYE3
Conference: IEEE Systems, Man and Cybernetics Society, Proceedings - 2005 International Conference on Systems, Man and Cybernetics, Oct 10-12 2005, Waikoloa, HI, United States Sponsor: IEEE Systems, Man and Cybernetics Society
Publisher: Institute of Electrical and Electronics Engineers Inc.
Abstract: In this paper we propose architecture for a Reconfigurable, Adaptive, Fault-Tolerant (RAFT) framework for application in real time systems with require multiple levels of redundancy and protection. Typical application environments include distributed processing, fault-tolerant computation, and mission and safety-critical systems. The framework uses Field Programmable Gate Array (FPGA) technologies with on the fly partial programmability achieving reconfiguration of a system component when the existing components fail or to provide extra reliability as required in the specification. The framework proposes the use an array of FPGA devices to implement a system that, after detecting an error caused by a fault, can adaptively reconfigure itself
摘要1:
本文目的是提出構建一個有自適應和容錯(筏)性質(zhì)的框架，它應用在需要多層次的冗余保護的實時系統(tǒng), 典型應用環(huán)境包括分布式處理,容錯計算,和任務與安全至關重要的系統(tǒng). 該框架采用了現(xiàn)場可編程門陣列( FPGA )技術的飛局部可編程功能實現(xiàn)重構系統(tǒng)組件，當現(xiàn)有的組件損壞或未能提供額外可靠性所要求的規(guī)格時，可以重構系統(tǒng). 該框架提出使用一組現(xiàn)場可編程門陣列器件實現(xiàn)一種系統(tǒng), 這種系統(tǒng) 經(jīng)過檢測一個錯誤所造成的過失,可通過自適應重構實現(xiàn)容錯. 在現(xiàn)場可編程門陣列中,通過定義了一種系統(tǒng)模式,使對系統(tǒng)用戶定義不同級別的可靠性選擇,提供一個監(jiān)督層的系統(tǒng)工程師，使其提供越來越廣泛地成為一個低成本的開發(fā)。
Erdogan, Sevki (University of Hawaii); Gersting, Judith L.; Shaneyfelt, Ted; Duke, Eugene L. Source: Conference Proceedings - IEEE International Conference on Systems, Man and Cybernetics, v 4, IEEE Systems, Man and Cybernetics Society, Proceedings - 2005 International Conference on Systems, Man and Cybernetics, 2005, p 3823-3827
ISSN: 1062-922X CODEN: PICYE3
Conference: IEEE Systems, Man and Cybernetics Society, Proceedings - 2005 International Conference on Systems, Man and Cybernetics, Oct 10-12 2005, Waikoloa, HI, United States Sponsor: IEEE Systems, Man and Cybernetics Society
Publisher: Institute of Electrical and Electronics Engineers Inc.
Abstract: In this paper we propose architecture for a Reconfigurable, Adaptive, Fault-Tolerant (RAFT) framework for application in real time systems with require multiple levels of redundancy and protection. Typical application environments include distributed processing, fault-tolerant computation, and mission and safety-critical systems. The framework uses Field Programmable Gate Array (FPGA) technologies with on the fly partial programmability achieving reconfiguration of a system component when the existing components fail or to provide extra reliability as required in the specification. The framework proposes the use an array of FPGA devices to implement a system that, after detecting an error caused by a fault, can adaptively reconfigure itself
摘要1:
本文目的是提出構建一個有自適應和容錯(筏)性質(zhì)的框架，它應用在需要多層次的冗余保護的實時系統(tǒng), 典型應用環(huán)境包括分布式處理,容錯計算,和任務與安全至關重要的系統(tǒng). 該框架采用了現(xiàn)場可編程門陣列( FPGA )技術的飛局部可編程功能實現(xiàn)重構系統(tǒng)組件，當現(xiàn)有的組件損壞或未能提供額外可靠性所要求的規(guī)格時，可以重構系統(tǒng). 該框架提出使用一組現(xiàn)場可編程門陣列器件實現(xiàn)一種系統(tǒng), 這種系統(tǒng) 經(jīng)過檢測一個錯誤所造成的過失,可通過自適應重構實現(xiàn)容錯. 在現(xiàn)場可編程門陣列中,通過定義了一種系統(tǒng)模式,使對系統(tǒng)用戶定義不同級別的可靠性選擇,提供一個監(jiān)督層的系統(tǒng)工程師，使其提供越來越廣泛地成為一個低成本的開發(fā)。
